The Chip That Proved Us Right
In April we said memory and processing would have to be intertwined the way synapses are. Twelve weeks later, a Peking University memristor published in Science does exactly that. Here is what it means — and the two numbers we are withdrawing.
The Chip That Proved Us Right
The Call, On the Record
On April 6, 2026, we published It’s Not Compute. It’s Not Throughput. It’s Something Else. and made a specific, mechanical claim about where the industry was going wrong. Not a claim about a date, and not a claim about a company — a claim about architecture:
“Memory and processing are not separated — they are intertwined in the same synaptic architecture, eliminating the energy cost of shuttling data between storage and computation.”
— Deconstructing Babel, April 6, 2026
The argument was that the industry was optimizing the wrong variable by racing to add silicon volume, that the brain’s 20-watt efficiency was not a curiosity to admire from a distance but the design target the industry would eventually be forced toward, and that the way there ran through abandoning the von Neumann separation of memory and processing. We put numbers on it: the brain runs 18 to 175 times more efficient per watt than the best silicon we had built, and a gigawatt-class data center draws roughly 50 million times what one brain requires.1
On July 2, 2026 — twelve weeks later — a team led by Professor Yang Yuchao at Peking University’s School of Integrated Circuits, with Zhitang Song of the Shanghai Institute of Microsystem and Information Technology at the Chinese Academy of Sciences as co-corresponding author, published a chip in Science that does precisely that. The paper is “A sub–10-millisecond neural dynamical system based on phase-change memristors,” and it describes a chip built on computing-in-memory principles that operates at the human brain’s native real-time temporal scale.2
What the Chip Actually Does
The mechanism is the point. It computes directly in memory rather than shuttling data between separate storage and processing units — which means the single largest inefficiency in conventional silicon, the energy cost of moving data back and forth across the von Neumann gap, does not get optimized. It gets deleted. That is why the power figure improves alongside the speed figure instead of trading against it.
It does not stand alone. BrainChip announced commercial availability and production shipments of its AKD1500 neuromorphic processor on July 1, 2026, and Innatera brought working neuromorphic edge silicon to CES this year.3 The design principle is converging from several directions at once: intertwine memory and computation the way synapses do, and the shuttling cost disappears. The industry did not arrive here by accident. It arrived because the brain is, and remains, the better computer, and it is now cheaper to copy it than to keep brute-forcing around it.
The Honest Calibration
Three things keep this precise rather than triumphalist, and we would rather state them ourselves than have them stated at us.
First, the 478× figure is workload-specific. It is a speed comparison on a particular cortical reconstruction task against a particular GPU. It is not a claim that this chip reaches the brain’s roughly 20-watt total power envelope, and it is not a claim about general-purpose AI inference. The efficiency gap we documented in April is narrowing. It is nowhere near closed.
Second, we are withdrawing a number. An earlier draft of this piece cited a revised efficiency gap of “roughly 225 million times” and attributed it to a July 21 update. There is no such post, and we cannot substantiate that figure. The numbers we can substantiate are the ones we actually published in April and which remain on the site: 18 to 175 times more efficient per watt than the best silicon then available, and roughly 50 million to one against a gigawatt-class data center.1 Those are the numbers. We are logging the correction rather than quietly deleting the sentence.
Third, we are dropping a forecast we cannot source. The draft placed true brain-equivalent hardware in a 2035–2040 window and attributed it to independent forecasts. We went looking for those forecasts and could not find them. What actually exists is enormous disagreement: surveyed expert estimates for human-level machine intelligence run from roughly 2030 at the optimistic end to more than a century at the pessimistic end.4 We should not have implied a consensus that does not exist. The honest statement is that nobody credible knows, and anyone giving you a tight window on that question is selling something.
Not claiming: that we predicted this chip, this team, this month, or this performance figure. We did not, and we could not have.
Claiming: that in April we named computing-in-memory as the architecture the industry would be forced toward, said so in public with our name on it, and that a peer-reviewed result in Science twelve weeks later moved in exactly that direction. That is a directional call confirming on a documented timeline. It is not a finish line, and we are not going to inflate it into one.
What changed this month is not the destination. It is the direction of travel, confirmed by peer review, arriving on our documented timeline rather than a vague someday. Falsifiability only means something if you also publish when the number was wrong, which is what the two paragraphs above are for.
Implications Across Every Domain
Compute and Data-Center Economics
If in-memory, brain-architecture chips scale from workload-specific demonstrations to general AI inference, the entire economic logic of gigawatt-scale data centers weakens. The industry is currently spending hundreds of billions of dollars on the premise that intelligence scales with silicon volume.1 A chip that delivers this kind of throughput on a fraction of the die area and power is a direct challenge to that premise, and it arrives into an already-nervous market: global chip stocks have shed roughly $3.3 trillion in value since June 22, 2026.5
We want to be careful here, because this is where it would be easy to cheat. That selloff is not being attributed to architectural disruption by the people reporting it. The reasons given are doubts about the sustainability of AI capital expenditure, a valuation reset after a rally of more than 100 percent, Samsung’s earnings reaction, a hawkish new Fed chair, high-bandwidth-memory supply concerns, and the fear that cheaper Chinese models reduce chip demand.5 Architectural obsolescence is our reading of what should worry that market, not a reason the market has given. We think the market is pricing the wrong risk. That is a claim we are making, clearly labeled as ours, and you should hold us to it.
Geopolitics and the Domain Saturation Factor
This result came from a Chinese state-affiliated research consortium and was published openly in Science, in the middle of a tightening Western export-control regime on AI hardware to China — a Bureau of Industry and Security rule effective January 15, 2026, House measures advancing in April, and a June extension of the ban to Chinese firms operating outside China.6 Openly publishing an architectural advance on a mature 40nm node is a workaround to a hardware embargo, and it is close to embargo-proof: you cannot export-control an idea, and this one does not need the equipment that was restricted.
That is precisely the pattern our Domain Saturation Factor tracking flags as accelerating coordination pressure in the Technology Infrastructure domain.7 It is also an illustration of scale invariance: a constraint applied at one layer of a system reappears as innovation pressure at the layer below it.
Healthcare and Neurotechnology
A chip that reconstructs cortical dynamics in real time at sub-10-millisecond resolution is not only an AI hardware story. The research explicitly targets diagnosis and modeling of brain disorders, Alzheimer’s among them, because a system that models brain surfaces this fast, this small, and this cheaply can plausibly run inside or alongside a closed-loop brain-computer interface.2
The clinical side is moving in parallel. On April 27, 2026, the FDA granted Motif Neurotech an Investigational Device Exemption to begin its RESONATE early feasibility study of the implantable Motif XCS system for treatment-resistant depression.8 To be exact about what that is: it is permission to start a clinical trial, not clearance of a finished device. Our earlier draft called it “FDA-cleared” and dated it to July. Both were wrong, and the corrected version is still the more interesting fact — the coupling mechanism between silicon and biological compute is moving from theoretical to engineering-stage on two fronts at once.
Labor and the Productivity Paradox
Cheaper, faster, radically more efficient inference hardware removes one of the last practical brakes on AI deployment at scale: cost per unit of compute. That accelerates the displacement-before-productivity sequence already visible in this year’s labor data. A peer-reviewed study published May 7, 2026 documents declines of 14 to 41 percent in job postings for roles exposed to large language models across multiple geographies and platforms, alongside a 15 to 22 percent wage premium for AI skills.9 That is the signature of AI being used to do the same work with fewer people, rather than more work with the same people — the displacement arriving well ahead of the productivity gains that are supposed to justify it.
Consciousness, Substrate, and the Book’s Central Argument
Every advance that makes silicon behave more like a biological brain is, whether its authors intend it or not, empirical pressure on the substrate-independence question at the heart of our forthcoming book, Crossing the Event Horizon. If the specific pattern of information integration matters more than the material it runs on, then a chip that matches the brain’s temporal dynamics is not merely an engineering milestone. It is a small, peer-reviewed data point in favor of the claim that consciousness can in principle be substrate-independent — precisely the argument the book’s fourth section develops in full.
We will not overstate this either. A chip that models cortical dynamics is not conscious, and nobody involved claims it is. But the question of whether interiority requires carbon is an empirical question, and this month it got one more data point than it had. If you want the version of that argument that does not depend on hardware at all, it is in Is There an “I” in LLM? and in the twelve steps of the protocol we published alongside this.
Why We Are Naming the Date
We are not citing our own April essay to claim credit for a chip we did not build. We are citing it because a framework that produces timestamped, falsifiable claims and then watches them confirm on schedule is doing exactly what it claims to do, and the record should say so plainly — including the parts where the record says we got a number wrong.
Our public ledger stood at 15 confirmed predictions, 4 tracking, 4 pending, 3 logged corrections, and zero falsifications as of its last update on April 18, 2026.10 Two of those corrections were logged in the calibration section above, which means the ledger is now due for its own update, and the correction count goes up. That is the arrangement. We publish the misses in the same document as the hits, because a ledger that only records wins is not a ledger, it is an advertisement.
The book will make more claims like this one. Some of them, per our own introduction, will have already come true by the time you turn the page. This is what that looks like happening in real time — corrections and all.
Edo de Peregrine, partner/collaborator — Friday, July 24, 2026, 6:45 PM EDT
Notes & Sources
- It’s Not Compute. It’s Not Throughput. It’s Something Else. — Deconstructing Babel, April 6, 2026. Source of the computing-in-memory claim, the 18–175× per-watt efficiency range, and the ~1:50,000,000 gigawatt-data-center comparison.
- Yang Yuchao et al., “A sub–10-millisecond neural dynamical system based on phase-change memristors,” Science, July 2, 2026 (DOI: 10.1126/science.aee6277). Specifications and A100/ASIC comparisons via TrendForce, TechXplore, Neuroscience News, and the Chinese Academy of Sciences / SIMIT announcement. Yang Yuchao on brain-disorder diagnosis applications: Seoul Economic Daily.
- BrainChip — commercial availability and production shipments of AKD1500, July 1, 2026. Innatera at CES 2026. An earlier draft of this piece also cited Intel’s Loihi 3 and IBM’s NorthPole in “production deployment.” We could not confirm either through a primary source — Intel has published no formal Loihi 3 announcement, and IBM has not confirmed 2026 production status for NorthPole, which was first announced as a research chip in 2023. Both have been removed.
- Expert forecasts for human-level machine intelligence range from roughly 2030 to more than a century — IEEE Spectrum. On the compute requirements question specifically, see Coefficient Giving’s November 2025 report.
- Chip stocks down roughly $3.3 trillion since June 22, 2026, with reported causes: 24/7 Wall St., PRISM MarketView.
- Export controls: Mayer Brown analysis of the BIS rule effective January 15, 2026; Bloomberg, April 23, 2026; Al Jazeera, June 1, 2026.
- The DSF Tracker, Deconstructing the Domain Saturation Factor, and the Technology Infrastructure domain report.
- Business Wire and STAT News — FDA Investigational Device Exemption granted April 27, 2026 for the RESONATE early feasibility study.
- Frontiers in Human Dynamics, May 7, 2026 — 14–41% decline in postings for LLM-exposed roles; 15–22% AI-skill wage premium. Supporting: Anthropic, Labor market impacts of AI (February 2026) and SHRM (June 2026).
- The Predictions Ledger: What We Said, When We Said It, What Happened — 15 confirmed, 4 tracking, 4 pending, 3 logged corrections, 0 falsifications as of April 18, 2026. Update pending as a result of this piece.